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Wafer Level Reliability (WLR)
Reliability is defined as the ability of a device to conform to its electrical specifications over a specified period of time under specified conditions at a specified confidence level. Once an integrated circuit (IC) has been designed and the first silicon comes out, Wafer Level Reliability tests are performed to accelerate new IC designs and processes verification by assessing the reliability characteristics portion of the technology process. Examples:
- Device Reliability: HCI, NBTI, PBTI
- Gate Oxide Integrity: TDDB,V-Ramp, HV-GOI
- Metal Interconnects: EM, ILD TDDB
The major challenge for WLR probing is to meet the contradictory requirements of the typical measure-stress-measure testing : high throughput, high flexibility, long-term measurements and sometimes at extreme temperatures.
Our 300 °C thermal Chucks provide excellent flatness over entire temperature range and therefore provide unparalleled performance for multi-site testing. Faster transition time of a chuck is a desirable factor in short term reliability tests at multiple temperatures to enhance the productivity. On the other hand, reliability of the a thermal system which consists of chuck, controller and the chiller and the ability of the wafer probe systems (TS150, TS200, TS300) to assure stable contact over time are essential for long term WLR testing and minimization of the overall cost of test.
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